Analysis of interconnect crosstalk defect coverage of test sets

In this paper, we address the problem of evaluating the effectiveness of test sets to detect crosstalk defects in interconnects of deep sub-micron circuits. The fast and accurate estimation technique will enable: (a) the evaluation whether legacy functional, delay, and boundary scan tests can be used for effective interconnect crosstalk defect coverage, (b) development of crosstalk tests if the legacy tests are not sufficient. Based on a covering relationship we establish between transition tests in detecting crosstalk defects, we develop an abstract crosstalk fault model for circuit interconnects. Based on this fault model, and the covering relationship, we develop a fast and efficient method to estimate the fault coverage of any general test set. We also develop a simulation-based technique to calculate the probability of occurrence of the defects corresponding to each fault, which enables the fault coverage analysis technique to produce fairly accurate estimates of the actual crosstalk defect coverage of a given test set. The crosstalk test and fault properties, as well as the accuracy of the proposed crosstalk coverage analysis techniques, have been validated through extensive simulation experiments. The experiments also demonstrate that the proposed crosstalk techniques are extremely fast: orders of magnitude faster than the alternative method of SPICE-level simulation. Finally, this fault coverage analysis technique has been successfully applied to a DSP core to grade the legacy tests for crosstalk faults on the buses, indicating the potential applications for the crosstalk testing of interconnects and buses in the system-on-chip.